Theoretical analysis and reduction techniques of DC capacitor ripples and requirements in inverters
DC link capacitor is an important component for many conventional topologies, such as threephase voltage source inverter (VSI), Hbridge VSI and etc. Minimization of the dc capacitor is an essential step towards developing and manufacturing compact lowcost inverter systems for high temperature operation, long life and high reliability. Traditionally, the dc capacitance has been determined according to empirical equations and computer simulations, which provides little insights into how to minimize the dc capacitor. In order to achieve an optimum minimization of the dc capacitor, an accurate theory to calculate the dc capacitor voltage ripple and current ripples must be developed first, then pulsewidth modulation (PWM) and control techniques or topological improvements can be further developed to minimize both dc voltage and current ripples. This dissertation is mainly divided into two parts. First half is minimizing the capacitor ripple and requirements for threephase VSI; while second half is for Hbridge VSI. In the first half of the dissertation, it proposes an accurate theory of calculating the dc link capacitor voltage ripples and current ripples for inverters and PWM rectifiers. The results are analyzed and summarized into graphs according to the theory, which helps find the right capacitance value for a given voltage ripple tolerance and the rms ripple current that the capacitor has to absorb. In hybrid electric vehicle (HEV) applications, the high voltage battery pack is connected to the dc link bus through a dcdc converter. Based on the aboveproposed theory, a PWM modulation method for the dcdc converter is developed to further reduce the dc capacitor current ripples and requirements. To verify the proposed theory and PWM method, a 150 kW inverter prototype has been built. The comparison between the calculation result and experimental result shows that they are in close agreement. For the second half of the dissertation, contributions for Hbridge inverters are made for photovoltaic and FACTs systems. As the demand of the renewable energy increases every year, the photovoltaic (PV) systems have been playing an important part in supplying energy for the global consumption. In order to connect PV modules to the grid without inserting any bulky low frequency stepup transformers, the cascaded Hbridge multilevel inverters are utilized to increase the output voltage level up to the grid voltage (e.g. 13.8 kV). The 2ω harmonic component on the dc link side of the Hbridge inverters has long been a thorny problem, which requires a huge dc link capacitor bank to absorb this 2ω low frequency current ripple in order to maintain the dc link voltage ripple under a tolerable value. This dissertation presents a simple 3rd harmonic injection method for the cascaded Hbridge multilevel inverters for photovoltaic systems at unity power factor. This approach achieves a 40% to 50% reduction of the dc link capacitance, without adding any extra components or increasing the control complexity. Same 2ω harmonic problem exists in FACTs devices, which is typically implemented by an Hbridge inverter. A new topology and control method are proposed to significantly reduce the dc capacitance to minimum by only adding a phase leg and an ac capacitor with the value of 1/10 of the original dc capacitance.
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 In Collections

Electronic Theses & Dissertations
 Copyright Status
 In Copyright
 Material Type

Theses
 Thesis Advisors

Peng, Fang Z.
 Committee Members

Mitra, Joydeep
Wang, Bingsen
Zhu, Guoming
 Date
 2014
 Program of Study

Electrical Engineering
 Degree Level

Doctoral
 Language

English
 Pages
 xvii, 172 pages
 ISBN

9781321207347
1321207344
 Permalink
 https://doi.org/doi:10.25335/M5TX7G